Requires the Secretary of Commerce to mandate chip security mechanisms for location verification before exporting integrated circuit products. Obligates reporting of tampering or diversion. Mandates the assessment and development of additional security mechanisms, considering national security and export compliance objectives.
Good coverage — Comprehensive governance measures or mitigations with clear procedures relating to the risk subdomain are explicitly described.
Minimal coverage — Brief mention but no specific mitigations, recommendations or governance measures relating to the risk subdomain are described.
All other risk subdomains had no coverage in this document.
Risk Coverage Summary
The document has good coverage of approximately 5-6 subdomains, with strong focus on malicious actors (4.1, 4.2), AI system security (2.2), competitive dynamics (6.4), and governance failure (6.5). Coverage is concentrated in security, export control compliance, and preventing unauthorized access to advanced computing hardware.
Good coverage — Comprehensive governance measures or mitigations with clear procedures relating to the sector are explicitly described.
Minimal coverage — Brief mention but no specific mitigations, recommendations or governance measures relating to the sector are described.
All other sectors had no coverage in this document.
Sectors Summary
The document primarily governs the Information sector (specifically data processing and telecommunications infrastructure) and the Manufacturing sector (integrated circuit production). It also has significant implications for Professional and Technical Services (IT consultants and technical services) and Scientific Research and Development Services that rely on advanced computing hardware.
Hard Law
Legislative Status Summary
This is a federal legislative bill (H.R. 3447) that, if enacted, would create binding legal obligations with mandatory requirements, enforcement mechanisms, and reporting obligations. The document uses mandatory language throughout ('shall require', 'shall submit') and establishes clear enforcement authority for the Secretary of Commerce.
Proposer
Target
Enforcer
Monitor
Lifecycle stages covered by the documents, as defined in the OECD Framework for the Classification of AI Systems
AI Lifecycle Summary
The document primarily focuses on the Deploy and Operate and Monitor stages of the AI lifecycle, with some coverage of Build and Use Model. It addresses security mechanisms for integrated circuits used in AI systems, emphasizing export controls, location verification, and post-deployment monitoring of hardware.
Terms relating to technical scope that are mentioned or implicitly referenced in the document
No technical scope terms identified.
Technical Scope Summary
The document focuses on integrated circuit products and computing hardware that enable AI systems, particularly advanced chips used for AI computation. It does not explicitly define AI models, systems, or specific AI categories, but addresses the hardware infrastructure layer that supports AI development and deployment.
Document data from AGORA, CSET Emerging Technology Observatory.